• DocumentCode
    3428453
  • Title

    The p-MOS controlled lateral thyristor: A MOS controllable thyristor suitable for integration

  • Author

    Chen, W. ; Amaratunga, G.A.J.

  • Author_Institution
    Dept. of Eng., Cambridge Univ., UK
  • fYear
    1995
  • fDate
    2-3 Oct 1995
  • Firstpage
    202
  • Lastpage
    205
  • Abstract
    A novel CMOS compatible lateral thyristor is proposed in this paper. Its thyristor conduction is fully controlled by a p-MOS gate. Loss of MOS control due to parasitic latch-up has been eliminated and triggering of the main thyristor at lower forward current achieved. The device operation has been verified by 2D numerical simulations and experimental fabrication
  • Keywords
    CMOS integrated circuits; MOS-controlled thyristors; power integrated circuits; 2D numerical simulations; CMOS compatible thyristor; MOS controlled lateral thyristor; p-MOS gate; parasitic latchup elimination; Anodes; Bipolar transistors; Cathodes; Charge carrier processes; Conductivity; Current density; MOS devices; Numerical simulation; Thyristors; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Bipolar/BiCMOS Circuits and Technology Meeting, 1995., Proceedings of the 1995
  • Conference_Location
    Minneapolis, MN
  • Print_ISBN
    0-7803-2778-0
  • Type

    conf

  • DOI
    10.1109/BIPOL.1995.493898
  • Filename
    493898