Title :
Digital circuit evolution and fitness landscapes
Author :
Vassilev, Vesselin K. ; Muller, J.F. ; Fogarty, Terence C.
Author_Institution :
Sch. of Comput., Napier Polytech. of Edinburgh, UK
Abstract :
We study the fitness landscapes generated by evolving digital circuits using an idealised model of a field-programmable gate array. It appears that the fitness landscapes of this engineering problem are quite different from many recently studied landscapes, often defined over simplified combinatorial and optimisation problems. The difference stems from the genotype representation which allows us to evolve the functionality and connectivity of an array of logic cells. Here, the genotypes are sequences which are defined over two completely different alphabets. We propose a model for studying the structure of these landscapes and measure correlation characteristics of the landscapes. It is furthermore shown that the evolutionary search can be improved when the results of the analysis are taken into account
Keywords :
circuit optimisation; digital circuits; evolutionary computation; field programmable gate arrays; sequences; alphabets; combinatorial problems; connectivity; correlation characteristics; digital circuit evolution; engineering problem; evolutionary search; field-programmable gate array; fitness landscapes; functionality; genotype representation; idealised model; logic cell array; optimisation problems; sequences; Circuit analysis computing; Circuit synthesis; Digital circuits; Field programmable gate arrays; Logic arrays; Logic circuits; Logic design; Logic gates; Programmable logic arrays; Routing;
Conference_Titel :
Evolutionary Computation, 1999. CEC 99. Proceedings of the 1999 Congress on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5536-9
DOI :
10.1109/CEC.1999.782595
