• DocumentCode
    3429862
  • Title

    Reconfigurable vector register windows for fast matrix computation on the orthogonal multiprocessor

  • Author

    Panda, Dhabaleswar Kumar ; Hwang, Kai

  • Author_Institution
    Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
  • fYear
    1990
  • fDate
    5-7 Sep 1990
  • Firstpage
    202
  • Lastpage
    213
  • Abstract
    The authors present the concept of vector register windows (VRWs) geared towards large scale matrix computation and image processing applications. The VRWs consist of multiple windows for vector registers providing parallel access and manipulation of large matrix data in the orthogonal multiprocessor (OMP). The number of windows and the number of registers in a window are dynamically reconfigurable over a range of values to match with the application problem size. An associated index manipulator provides programmable and on-the-fly data manipulation. The index manipulation feature is shown to be quite powerful for carrying out complex data manipulation functions like row (column) shift, row (column) exchange, matrix rotation, etc. Some matrix algorithms, efficiently utilizing the VRWs, are illustrated
  • Keywords
    computerised picture processing; multiprocessing systems; parallel architectures; special purpose computers; column exchange; column shift; complex data manipulation functions; fast matrix computation; image processing applications; index manipulation; index manipulator; large scale matrix computation; matrix algorithms; matrix rotation; multiple windows; on-the-fly data manipulation; orthogonal multiprocessor; parallel access; programmable data manipulation; reconfigurable vector register windows; row exchange; row shift; vector register windows; Application software; Computer architecture; Concurrent computing; Data processing; Image processing; Large-scale systems; Manipulator dynamics; Multiprocessor interconnection networks; Programming profession; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application Specific Array Processors, 1990. Proceedings of the International Conference on
  • Conference_Location
    Princeton, NJ
  • Print_ISBN
    0-8186-9089-5
  • Type

    conf

  • DOI
    10.1109/ASAP.1990.145457
  • Filename
    145457