DocumentCode :
3430685
Title :
High speed multi-channel data acquisition chip
Author :
Singh, Jugdutt
Author_Institution :
Dept. of Electr. & Electron. Eng., Victoria Univ. of Technol., Melbourne, Vic., Australia
Volume :
1
fYear :
1998
fDate :
1998
Firstpage :
401
Abstract :
This paper describes the design and performance of a very high speed, low power multichannel data acquisition chip implemented using Gallium Arsenide (GaAs) technology. The mixed analog-digital circuit uses source coupled MESFET logic for analog components and GaAs merged logic for digital components. The design of n-bit flash analog-to-digital converter requires only 2(n-1) comparators as compared to (2n-1) comparators for a standard n-bit flash converter. The data acquisition chip dissipates 185.6 milliwatts of power with conversion time of 0.85 nsec. The results validate appropriateness of design technology and techniques used for mixed analog-digital circuit design on a single chip
Keywords :
III-V semiconductors; MESFET integrated circuits; VLSI; analogue-digital conversion; data acquisition; gallium arsenide; high-speed integrated circuits; low-power electronics; mixed analogue-digital integrated circuits; 0.85 ns; 185.6 mW; GaAs; GaAs merged logic; GaAs technology; SCFL; analog-to-digital converter; flash ADC; high speed data acquisition chip; low power chip; mixed analog-digital circuit; multi-channel data acquisition chip; source coupled MESFET logic; Analog computers; Analog-digital conversion; Appropriate technology; Coupling circuits; Data acquisition; Data conversion; Digital-analog conversion; Gallium arsenide; Logic circuits; Signal design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 1998 IEEE International Conference on
Conference_Location :
Lisboa
Print_ISBN :
0-7803-5008-1
Type :
conf
DOI :
10.1109/ICECS.1998.813349
Filename :
813349
Link To Document :
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