DocumentCode
3430700
Title
Performance analysis of banyan shift ATM switch
Author
Park, Seok C. ; Lee, Yung J. ; Tsai, Wei K.
Author_Institution
Dept. of Comput. Sci., Kyungwon Univ., Kyungki-do, South Korea
fYear
1992
fDate
16-20 Nov 1992
Firstpage
147
Abstract
The authors introduce a new ATM switch architecture based on banyan interconnection networks. Its hardware is less complex than that of an output queueing switch. The reduction in the hardware complexity can be obtained without either losing the self-routing property or suffering from performance degradation under uniform and nonuniform traffic. The switch is constructed with shift network. It has an internal buffer that is interconnected in the banyan networks. The shift networks allow a cell to be sent to the correct output port. It needs only the destination address to route a cell regardless of the state of the switch. Although the switch becomes blocking, it retains the self-routing property and achieves the maximum throughput of 100% with only small additional delay
Keywords
asynchronous transfer mode; multiplexing equipment; queueing theory; switching networks; asynchronous transfer mode; banyan interconnection networks; banyan shift ATM switch; hardware complexity; performance; self-routing property; switch architecture; throughput; Added delay; Asynchronous transfer mode; Degradation; Hardware; Multiprocessor interconnection networks; Performance analysis; Switches; Telecommunication traffic; Throughput; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
Singapore ICCS/ISITA '92. 'Communications on the Move'
Print_ISBN
0-7803-0803-4
Type
conf
DOI
10.1109/ICCS.1992.254968
Filename
254968
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