Implementation of an Embedded GPS Receiver Based on FPGA and MicroBlaze

A GPS receiver based on FPGA and MicroBlaze was developed. This kind of GPS receiver is made up of a RF Front- End and FPGA, with NemeriX NJ1006A and Xilinx XC2VP30 as its core chips. The RF Front-End chip NJ1006A receives the GPS signal and converts it to IF signal which is transfered to FPGA .The correlators array , C/A code generator,C/A code DCO and carrier DCO were analyzed and designed with Verilog hardware description language on FPGA. The algorithm of acquisition and tracking of GPS signal were discussed and implemented with MicroBlaze soft processor core in XC2VP30 . Meanwhile, the MicroBlaze soft processor core is responsible for communicating with FPGA user logic via the interface named OPB Bus. A parallel correlator using three local replica C/A code was developed and implemented on this FPGA-based GPS receiver, which improved the acquiring efficiency and accuracy of the GPS receiver. The simulation and verification results of the algorithm of GPS receiver are provided. The results demonstrated that the availability and reliability of this kind of design scheme of GPS receiver works well.