DocumentCode
3431216
Title
Fast hardware units for the computation of accurate dot products
Author
Knöfel, Andreas
Author_Institution
Inst. for Appl. Math., Karlsruhe Univ., Germany
fYear
1991
fDate
26-28 Jun 1991
Firstpage
70
Lastpage
74
Abstract
The principle of operation of fast hardware units for the computation of accurate dot products is described, and a hardware description is provided. The circuits presented are easy to implement with available techniques as a single chip and deliver a high-performance solution for dot product computations. Besides the RAM for the long accumulator, all units can be used for scalar operations to avoid a hardware overhead for scalar and vector units. The additional hardware amount for a combined scalar and vector computation unit is about 120 K transistors and therefore is also applicable to PCs. The entire dataflow from the input interface down to the accumulation is handled. The pipeline of the first unit has 24 stages and the pipeline of the second has only six stages for the entire process. Thus, these units are also applicable to short vectors and computations with complex numbers
Keywords
digital arithmetic; multiplying circuits; PCs; RAM; accurate dot products; chip; circuits; complex numbers; fast hardware units; input interface; long accumulator; pipeline; scalar operations; transistors; Application software; Computer architecture; Computer languages; Digital arithmetic; Error analysis; Floating-point arithmetic; Hardware; Mathematics; Problem-solving; US Department of Transportation;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 1991. Proceedings., 10th IEEE Symposium on
Conference_Location
Grenoble
Print_ISBN
0-8186-9151-4
Type
conf
DOI
10.1109/ARITH.1991.145536
Filename
145536
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