Study of photo resist-free process for shallow trench isolation etch on advance VLSI technology

Author

Tso, Chia-Tzong ; Ko, Mei-Ho ; Huang, Chuan-Chieh ; Kuo, So-Wen

Author_Institution

Taiwan Semicond. Manuf. Co., Ltd., Hsin-Chu, Taiwan

fYear

2002

fDate

10-11 Dec. 2002

Firstpage

153

Lastpage

156

Abstract

The photo resist (PR) tilting defects and bridge defect occurred for shallow trench isolation etch with PR free process on high density plasma etch chamber TCP9400 were studied. First, serious PR tilting defects induced by 193 nm PR charging effect during the etching process was noted in our study. Through the L9 experiment data, a new etch recipe which optimizes the source power, pressure and etch gas chemistry was studied to solve this problem. Results showed that the new approach can not only eliminated defect, but also improve device enhanced effective channel (Weff) and Cp yield. The bridge defect was recovered by optimizing PR in situ strip procedure. The defect count can significantly reduced to 75% of its original level.

Keywords

VLSI; isolation technology; optimisation; photoresists; plasma chemistry; semiconductor technology; sputter etching; VLSI; bridge defect; device enhanced effective channel; gas chemistry; high density plasma etch; photoresist tilting defects; photoresist-free process; shallow trench isolation etch; Bridges; Etching; Isolation technology; Plasma applications; Plasma chemistry; Plasma density; Plasma sources; Resists; Strips; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Manufacturing Technology Workshop, 2002

Print_ISBN

0-7803-7604-8

Type

conf

DOI

10.1109/SMTW.2002.1197397

Filename

1197397