Title :
A 2 GHz Low Power Down-conversion Quadrature Mixer in 0.18-μm CMOS
Author_Institution :
Dept. of Electr. & Comput. Eng., Ohio State Univ., Columbus, OH
Abstract :
This paper describes a 1.5-V 2 GHz I/Q down conversion mixer for a WCDMA front-end receiver in a 0.18-mum CMOS process. The mixer achieves a conversion gain of 20.55 dB within 1-dB compression point (iCP1dB) of -9.2 dBm. It also achieves a double side band (DSB) noise figure (NF) of 8.96 dB. The mixer acquires the third order input referred intercept point (IIP3) of -0.54 dBm. The mixer consumes only 4.0 mA of current from a 1.5-V power supply
Keywords :
CMOS analogue integrated circuits; UHF frequency convertors; UHF integrated circuits; UHF mixers; code division multiple access; low-power electronics; radio receivers; 0.18 micron; 1.5 V; 2 GHz; 20.55 dB; 4 mA; 8.96 dB; CMOS integrated circuits; WCDMA front-end receiver; analog-RF integrated circuits; conversion gain; double side band noise figure; low power down-conversion quadrature mixer; wideband code division multiple access; CMOS digital integrated circuits; CMOS process; CMOS technology; Energy consumption; Low voltage; Multiaccess communication; Noise figure; Noise measurement; Radio frequency; Radiofrequency integrated circuits;
Conference_Titel :
VLSI Design, 2007. Held jointly with 6th International Conference on Embedded Systems., 20th International Conference on
Conference_Location :
Bangalore
Print_ISBN :
0-7695-2762-0
DOI :
10.1109/VLSID.2007.6
