DocumentCode :
3432170
Title :
FPGA implementation of four-step genetic search algorithm
Author :
So, Man F. ; Wu, Angus
Author_Institution :
Dept. of Electron. Eng., City Univ. of Hong Kong, Hong Kong
Volume :
2
fYear :
1999
fDate :
5-8 Sep 1999
Firstpage :
1143
Abstract :
Genetic algorithm (GA) has been applied to block matching algorithm (BMA) and demonstrates positively its capability in BMA. Four-step genetic search (4GS) has been proposed. The mean square error (MSE) performance of 4GS is close to FS. The computational cost of 4GS is close to the well known three-step search (3SS). Realization of 4GS can be applied in video encoding hardware. Practical implementation issues of 4GS using FPGA are discussed. Since FPGA is a reconfigurable device, the configuration of 4GS module can be changed as frame size is changed
Keywords :
data compression; field programmable gate arrays; genetic algorithms; image sequences; mean square error methods; video coding; 4GS module; FPGA implementation; block matching algorithm; computational cost; four-step genetic search algorithm; frame size; mean square error; reconfigurable device; three-step search; video encoding hardware; Biological cells; Computational efficiency; Design engineering; Electronic design automation and methodology; Energy consumption; Field programmable gate arrays; Genetic engineering; Hardware; Mean square error methods; Redundancy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
Conference_Location :
Pafos
Print_ISBN :
0-7803-5682-9
Type :
conf
DOI :
10.1109/ICECS.1999.813435
Filename :
813435
Link To Document :
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