Impact of gate current on first order parameter extraction in sub-0.1 μm CMOS technologies

The impact of the gate leakage current on long MOS transistor characterization is investigated in this paper. Particularly for first order parameter extraction, a new method is proposed here to rid the gate current on advanced technologies with thin gate oxides. In linear and in strong inversion regimes, we first demonstrate experimentally a 50/50 partition of the gate current between source and drain nodes. TCAD simulations performed for several oxide thicknesses and biases also confirm this partition. The intrinsic channel current of the MOS transistor can then be isolated to extract first order parameters, especially in the case of large area devices which strongly suffer from gate leakage. We show that this I_G correction permits to extract these parameters in a more consistent way. Finally, we evaluate the extraction error induced by the gate leakage current for varying oxide thicknesses and channel lengths.