DocumentCode
3432883
Title
Fast and precise subthreshold slope method for extracting gate capacitive coupling coefficient in flash memory cells
Author
Cho, Caleb Yu-Sheng ; Chen, Ming-Jer ; Chen, Chiou-Feng
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
2003
fDate
17-20 March 2003
Firstpage
186
Lastpage
190
Abstract
A fast and precise subthreshold slope method for extraction of gate capacitive coupling coefficient is substantially confirmed by experimental data from three types of flash memory cells: stacked gate, sidewall source-side injection (SSI), and split-gate cells. This new method furnishes promising potentials: (i) it can eliminate the effect of process variations; (ii) the traditional source or drain capacitive coupling measurement becomes unnecessary; (iii) only a few DC measurements are needed; and (iv) even dummy transistors can be removed. Therefore, the method is highly suitable as an in-line process monitor.
Keywords
capacitance; flash memories; integrated circuit measurement; integrated memory circuits; process control; process monitoring; DC measurements; SSI cells; drain capacitive coupling measurement; dummy transistor removal; flash memory cells; gate capacitive coupling coefficient; in-line process monitor; process variations; sidewall source-side injection cells; source capacitive coupling measurement; split-gate cells; stacked gate cells; subthreshold slope method; Capacitance; Character generation; Data engineering; Data mining; Flash memory; Flash memory cells; Monitoring; Nonvolatile memory; Silicon; Split gate flash memory cells;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 2003. International Conference on
Print_ISBN
0-7803-7653-6
Type
conf
DOI
10.1109/ICMTS.2003.1197459
Filename
1197459
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