Title :
Equivalence and Dominance Relations Between Fault Pairs and Their Use in Fault Pair Collapsing for Fault Diagnosis
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN
Abstract :
Equivalence and dominance relations used earlier in fault diagnosis procedures are defined as relations between faults, similar to the relations used for fault collapsing. Since the basic entity of diagnostic fault simulation and test generation is a fault pair, and not a single fault, we introduce a framework where equivalence and dominance relations are defined for fault pairs. Using equivalence and dominance relations between fault pairs, we describe a fault pair collapsing process, where fault pairs are removed from consideration under diagnostic fault simulation and test generation since they are guaranteed to be distinguished when other fault pairs are distinguished. We demonstrate the full extent of fault pair collapsing by considering circuits with small numbers of inputs. We also describe an efficient fault pair collapsing procedure for larger circuits based on structural analysis
Keywords :
equivalence classes; fault simulation; logic testing; set theory; diagnostic fault simulation; dominance relations; equivalence relations; fault diagnosis; fault pair collapsing; structural analysis; test generation; Circuit faults; Circuit simulation; Circuit testing; Cities and towns; Computational modeling; Fault detection; Fault diagnosis;
Conference_Titel :
VLSI Design, 2007. Held jointly with 6th International Conference on Embedded Systems., 20th International Conference on
Conference_Location :
Bangalore
Print_ISBN :
0-7695-2762-0
DOI :
10.1109/VLSID.2007.78