DocumentCode :
3433044
Title :
Impact of grain number fluctuations in the MOS transistor gate on matching performance
Author :
Difrenza, R. ; Vildeuil, J.C. ; Llinares, P. ; Ghibaudo, G.
Author_Institution :
STMicroelectronics, Crolles, France
fYear :
2003
fDate :
17-20 March 2003
Firstpage :
244
Lastpage :
249
Abstract :
This paper presents a compact model for the gate impact on MOS transistor matching. It is based on the random variations of grain number in the polycrystalline gate. The model is validated by fitting mismatch increase with substrate bias. This study highlights the importance of local polysilicon depletion and gives a better understanding of complex mechanisms that are responsible for MOSFET mismatch.
Keywords :
CMOS integrated circuits; MOSFET; curve fitting; fluctuations; integrated circuit measurement; integrated circuit modelling; semiconductor device models; CMOS technology; MOS transistor gate; MOS transistor matching; MOSFET mismatch; compact model; grain number fluctuations; local polysilicon depletion; matching performance; model mismatch fitting; polycrystalline gate; random grain number variations; substrate bias; Amorphous materials; Annealing; Equations; Fluctuations; Furnaces; MOS devices; MOSFET circuits; Semiconductor process modeling; Stochastic processes; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 2003. International Conference on
Print_ISBN :
0-7803-7653-6
Type :
conf
DOI :
10.1109/ICMTS.2003.1197469
Filename :
1197469
Link To Document :
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