Title :
A Fast and Accurate approach for Full Chip Leakage Analysis of Nano-scale circuits considering Intra-die Correlations
Author :
Bhardwaj, Sarvesh ; Vrudhula, Sarma
Author_Institution :
Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ
Abstract :
This paper presents an accurate and efficient approach for estimating the full chip leakage in the presence of intra-die variations. We use an accurate model for leakage in which the leakage is exponentially dependent on a quadratic function of the device parameters. The intra-die correlations in the device parameters are accounted by representing the parameters in terms of abstract independent random variables using Karhunen-Loeve expansion. The total circuit leakage is computed using an efficient sum operation. Our results on ISCAS89 benchmark circuits show a speed up of up to 500times compared to Monte Carlo analysis, with average percentage difference in mean and variance being less than 1.5%
Keywords :
CMOS integrated circuits; Karhunen-Loeve transforms; Monte Carlo methods; integrated circuit modelling; Karhunen-Loeve expansion; Monte Carlo analysis; chip leakage analysis; intra-die correlations; leakage estimation; nanoscale circuits; quadratic function; Analysis of variance; CMOS technology; Circuit analysis; Gate leakage; MOSFETs; Monte Carlo methods; Random variables; State estimation; Taylor series; Threshold voltage;
Conference_Titel :
VLSI Design, 2007. Held jointly with 6th International Conference on Embedded Systems., 20th International Conference on
Conference_Location :
Bangalore
Print_ISBN :
0-7695-2762-0
DOI :
10.1109/VLSID.2007.11