Title :
A post-layout optimization method with automatic device type selection for BiCMOS analog circuits
Author :
Reich, T. ; Dimov, B. ; Lang, Ch ; Boos, V. ; Hennig, E.
Author_Institution :
Inst. of Microelectron. & Mechatron. Syst. gGmbH, Ilmenau, Germany
Abstract :
In this paper, we present a novel post-layout performance optimization method for BiCMOS analog circuits. Its main feature is a new approach for varying the types of non-scalable devices automatically during the design process using a gradient-based optimizer. This greatly extends the design space for BiCMOS circuits in computer-aided circuit optimization and, consequently, the reuse potential for existing circuit topologies and layouts. The method has been demonstrated successfully on the post-layout optimization of a 0.6-¿m BiCMOS high-speed operational amplifier.
Keywords :
BiCMOS analogue integrated circuits; circuit optimisation; high-speed integrated circuits; integrated circuit layout; network topology; operational amplifiers; BiCMOS analog circuit; automatic device type selection; circuit layout; circuit topology; computer-aided circuit optimization; gradient-based optimizer; high-speed operational amplifier; nonscalable device; post-layout performance optimization; size 0.6 mum; Analog circuits; BiCMOS integrated circuits; Circuit optimization; Circuit simulation; Design optimization; Mechatronics; Microelectronics; Optimization methods; Process design; Switches;
Conference_Titel :
Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on
Conference_Location :
Yasmine Hammamet
Print_ISBN :
978-1-4244-5090-9
Electronic_ISBN :
978-1-4244-5091-6
DOI :
10.1109/ICECS.2009.5410781
