A novel algorithm to extract open defects from industrial designs

Open defect is one of the most common defects in CMOS integrated circuits ICs. For a precise and realistic testing and diagnosis of this defect, it becomes mandatory to extract its location and segments that disconnects from circuit´s layout. However, current defect extraction algorithms are limited to bridging faults extraction. In this paper, we present a novel algorithm to extract potential open defects caused by defective vias. Experimental results on industrial designs showing the algorithm´s performance are presented.