Design and Testing of an Integrated Circuit for Multi-Electrode Neural Recording

The authors have developed a single-chip neural recording system with wireless power delivery and telemetry. The 0.5-mum CMOS IC is designed to be bonded to the back of a 100-channel Utah electrode array. A pad near each amplifier allows connection of the chip to the MEMS electrode array. The complete integrated neural interface receives power wirelessly through a 2.64-MHz inductive link. A clock, regulated supply, and commands are derived from the power signal .The neural amplifiers each have a gain of 60 dB. A 10-bit charge-redistribution ADC is used to digitize the signal from one amplifier selected with an analog MUX. Digitizing all channels simultaneously would generate prohibitively high data rates; therefore, the authors perform data reduction by incorporating one-bit "spike detectors" into each amplifier. Neural data is transmitted off chip using an integrated 433-MHz FSK transmitter. The chip measures 4.7 times 5.9 mm and consumes 13.5 mW of power