DocumentCode
3434303
Title
Threshold voltage instability at low temperatures in partially depleted thin film SOI MOSFETs
Author
Wang, Janet ; Kistler, Neal ; Woo, Jason ; Viswanathan, C.R.
Author_Institution
California Univ., Los Angeles, CA, USA
fYear
1990
fDate
2-4 Oct 1990
Firstpage
91
Lastpage
92
Abstract
The threshold voltage instability at low temperatures due to the floating Si film in partially depleted SIMOX was examined at low temperatures under normal operating conditions. Floating-film SOI MOS transistors suffer an accumulation of holes generated by impact ionization near the drain, at the lower Si film interface. As the potential at this interface increases due to hole accumulation, the source junction becomes forward biased, limiting the amount of charge which can accumulate. This causes the saturation kink effect. The increase in potential at the lower interface acts analogously to a positive bias in bulk devices and effectively decreases the threshold voltage of the device. The use of the channel contact alleviates the hole accumulation effect by providing a conducting path for the generated holes. Hence, the grounded film exhibits a higher threshold voltage than the floating film
Keywords
impact ionisation; insulated gate field effect transistors; semiconductor-insulator boundaries; 300 to 77 K; SIMOX; SOI MOSFET; Si-SiO2; accumulation of holes; channel contact; floating substrate effects; impact ionization; low temperatures; partially depleted; saturation kink effect; threshold voltage instability; Current measurement; Intrusion detection; MOSFETs; Stress; Temperature; Threshold voltage; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
SOS/SOI Technology Conference, 1990., 1990 IEEE
Conference_Location
Key West, FL
Print_ISBN
0-87942-573-3
Type
conf
DOI
10.1109/SOSSOI.1990.145724
Filename
145724
Link To Document