The development of the WASP 3 processor

Author

Jalowiecki, I.P. ; Hedge, S.J. ; Williams, Ron

Author_Institution

Brunel Univ., Uxbridge, UK

fYear

1993

fDate

1993

Firstpage

20

Lastpage

29

Abstract

The ASP (associative string processor) is a massively parallel, fault tolerant, fully associative processor designed for the implementation of very compact, easily extensible, modular low-multiple-instruction, multiple-data/high-single-instruction multiple-data (low-MIMD/high-SIMD) parallel processing systems. It is capable of supporting real-world applications of continuous data input and tightly integrated numeric and symbolic computations. The ASP module architecture and the wafer-scale (WASP-3) concept are described.

Keywords

VLSI; microprocessor chips; parallel architectures; ASP module architecture; continuous data input; fault tolerance; high-single-instruction multiple-data; low-MIMD/high-SIMD parallel processing; massively parallel processor; modular low-multiple-instruction; multiple-data; numeric computations; symbolic computations; wafer-scale associative string processor; Application software; Application specific processors; Associative processing; Computer architecture; Computer buffers; Concurrent computing; Fault tolerance; Fault tolerant systems; Parallel processing; Process design;

fLanguage

English

Publisher

ieee

Conference_Titel

Wafer Scale Integration, 1993. Proceedings., Fifth Annual IEEE International Conference on

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-0867-0

Type

conf

DOI

10.1109/ICWSI.1993.255277

Filename

255277