Title :
High-k MOSFET performance degradation by plasma process-induced charging damage — Impacts on device parameter variation
Author :
Eriguchi, Koji ; Kamei, Masashi ; Takao, Y. ; Ono, Keishi
Author_Institution :
Kyoto Univ., Kyoto, Japan
Abstract :
We discuss plasma charging damage (PCD) to high-k gate dielectrics, in particular, the threshold voltage shift (ΔVth) in metal-oxide-semiconductor field-effect transistors (MOSFETs). The PCD induced by the antenna effect is focused on, and ΔVth and its variation are estimated for MOSFETs treated by various plasma processes. The direction of threshold voltage shift in damaged high-k MOSFETs was found to depend on the amount of damage, i.e., the polarity itself results in "negative" or "positive" as the charging damage varies. We demonstrate a model prediction based on both the power-law dependence of ΔVth on the antenna ratio r (= exposed metal interconnect area/gate area) and the r distribution deduced from an interconnect-length distribution function (ILDF) in a large-scale integrated (LSI) circuit. Then, we simulate the variation in ΔVth [σ(ΔVth)]. PCD to high-k dielectrics may lead to a considerable contribution to MOSFET-parameter fluctuations.
Keywords :
MOSFET; high-k dielectric thin films; large scale integration; LSI circuit; MOSFET performance degradation; PCD; antenna effect; antenna ratio; device parameter variation; high-k gate dielectrics; interconnect-length distribution function; large-scale integrated circuit; metal interconnect area-gate area; metal-oxide-semiconductor field-effect transistors; model prediction; plasma process-induced charging damage; power-law dependence; threshold voltage shift; Antennas; High K dielectric materials; Integrated circuit interconnections; Logic gates; Plasmas; Stress; Threshold voltage;
Conference_Titel :
Integrated Reliability Workshop Final Report (IRW), 2012 IEEE International
Conference_Location :
South Lake Tahoe, CA
Print_ISBN :
978-1-4673-2749-7
DOI :
10.1109/IIRW.2012.6468925