DocumentCode
3435135
Title
On the generation of pseudo-deterministic two-patterns test sequence with LFSRs
Author
Dufaza, Christian ; Zorian, Yervant
Author_Institution
LIRMM, CNRS, Montpellier, France
fYear
1997
fDate
17-20 Mar 1997
Firstpage
69
Lastpage
76
Abstract
Many Built-in Self Test (BIST) pattern generators use Linear Feedback Shift Registers (LFSR) to generate test sequences. In this paper, we address the generation of deterministic pairs of patterns for delay faults testing with LFSRs. A new synthesis procedure for a n-size LFSR is given and guarantees that a deterministic set of n precomputed test pairs is embedded in the maximal length pseudo-random test sequence of the LFSR. Sufficient and necessary conditions for the synthesis of this pseudo-deterministic LFSR are provided and show that at-speed delay faults testing becomes a reality without any additional cost for the LFSR. Moreover, since the theoretical properties of LFSRs are preserved, our method could be beneficially used in conjunction with any other technique proposed so far
Keywords
binary sequences; built-in self test; circuit feedback; delays; integrated circuit testing; logic design; logic testing; matrix algebra; shift registers; BIST pattern generators; LFSRs; at-speed delay faults testing; built-in self test; delay faults; linear feedback shift registers; maximal length pseudo-random test sequence; pseudo-deterministic LFSR; pseudo-deterministic two-patterns test sequence; synthesis procedure; test sequence generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Delay; Fault detection; Logic testing; Pattern analysis; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
European Design and Test Conference, 1997. ED&TC 97. Proceedings
Conference_Location
Paris
ISSN
1066-1409
Print_ISBN
0-8186-7786-4
Type
conf
DOI
10.1109/EDTC.1997.582334
Filename
582334
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