DocumentCode :
3435456
Title :
Flexible Workflows for Digital Design in the Nano Era
Author :
Minor, Mirjam ; Koldehoff, Andreas ; Schmalen, Daniel ; Bergmann, Ralph
Author_Institution :
Dept. of Bus. Inf. Syst. II, Trier Univ.
fYear :
2006
fDate :
38869
Firstpage :
273
Lastpage :
278
Abstract :
This paper presents work in progress on an adaptive workflow management tool for digital design projects. The chip design follows standardized default processes which are adapted during an ongoing project by changing requirements from both design and application imponderabilities. Our approach focuses on flexible monitoring and authoring support of adaptive workflows in a real-world application
Keywords :
logic design; microprocessor chips; semiconductor device manufacture; workflow management software; adaptive workflow management tool; digital chip design; flexible workflows; nano era; Application specific integrated circuits; Chip scale packaging; Collaborative work; Electronic design automation and methodology; Field programmable gate arrays; Foundries; Hardware design languages; Manufacturing processes; Monitoring; Process design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Enabling Technologies: Infrastructure for Collaborative Enterprises, 2006. WETICE '06. 15th IEEE International Workshops on
Conference_Location :
Manchester
ISSN :
1524-4547
Print_ISBN :
0-7695-2623-3
Type :
conf
DOI :
10.1109/WETICE.2006.42
Filename :
4092222
Link To Document :
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