DocumentCode
3435778
Title
A gridless multi-layer router for standard cell circuits using CTM cells
Author
Tseng, Hsiao-Ping ; Sechen, Carl
Author_Institution
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
fYear
1997
fDate
17-20 Mar 1997
Firstpage
319
Lastpage
326
Abstract
We present a gridless multi-layer router suitable for standard cell circuits using central terminal model (CTM) cells. A CTM cell has pins in the middle which split the over-the-cell routing region into top and bottom parts. Our router routes nets in both the channel (if needed) and over-the-cell. The router uses a combined constraint graph and tile expansion algorithm. It achieves channelless solutions for the Primary1 circuit by routing over the cell in three layers. For classical channel routing examples, it achieves solutions at density for Deutsch´s difficult example in two, three, four and five metal layers. It also generates equal or better results compared to the best of the previous channel routers for all the examples we have tried
Keywords
VLSI; circuit layout CAD; computational complexity; graph theory; integrated circuit layout; network routing; CTM cells; Primary1 circuit; central terminal model cells; channel routing; channelless solutions; constraint graph; gridless multi-layer router; over-the-cell routing region; standard cell circuits; tile expansion algorithm; Circuits; Clocks; Design automation; Pins; Routing; Tiles; Very large scale integration; Wires; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
European Design and Test Conference, 1997. ED&TC 97. Proceedings
Conference_Location
Paris
ISSN
1066-1409
Print_ISBN
0-8186-7786-4
Type
conf
DOI
10.1109/EDTC.1997.582377
Filename
582377
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