Effectiveness comparisons of outlier screening methods for frequency dependent defects on complex ASICs

Author

Benware, B.R. ; Madge, R. ; Lu, C. ; Daasch, R.

fYear

2003

fDate

27 April-1 May 2003

Firstpage

39

Lastpage

46

Abstract

In sub-micron processes, resistive path defects are increasingly contributing to the yield loss and the customer fail pareto. Data has been collected on a series of ASIC products and it has been used to compare the effectiveness of full vector set transition delay fault tests with reduced vector sets, minVDD, customer functional tests and customers system fails. Results show that fault models do not predict the defect coverage well and cost effective screening of frequency outliers and minVDD outliers is possible and is critical in improving customer quality.

Keywords

application specific integrated circuits; failure analysis; fault location; integrated circuit reliability; integrated circuit testing; integrated circuit yield; quality control; complex ASIC; cost effective screening; customer quality; customer system failures; defect coverage; fault models; frequency outliers; full vector set transition delay fault tests; functional tests; minVDD outliers; outlier screening methods; reduced vector sets; resistive path defects; screening method effectiveness; yield loss; Application specific integrated circuits; Costs; Delay; Frequency dependence; Large scale integration; Logic design; Logic testing; Production; System testing; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Test Symposium, 2003. Proceedings. 21st

ISSN

1093-0167

Print_ISBN

0-7695-1924-5

Type

conf

DOI

10.1109/VTEST.2003.1197631

Filename

1197631