DocumentCode :
3435826
Title :
Fault-secure shifter design: results and implementations
Author :
Duarte, Ricardo O. ; Nicolaidis, M. ; Bederr, H. ; Zorian, Y.
Author_Institution :
TIMA, Grenoble, France
fYear :
1997
fDate :
17-20 Mar 1997
Firstpage :
335
Lastpage :
341
Abstract :
Self-checking designs will gain increasing interest in industrial applications if they satisfy the following requirements: high fault coverage, reduced hardware cost and reduced design effort. This work is aimed to reach these requirements for the design of self-checking shifters and is part of a broader project concerning the design of self-checking data paths
Keywords :
automatic testing; decoding; design for testability; error detection; fault tolerant computing; integrated circuit reliability; integrated circuit testing; integrated logic circuits; logic CAD; logic testing; fault-secure shifter design; hardware cost reduction; high fault coverage; self-checking data paths; self-checking designs; self-checking shifters; Arithmetic; Automatic testing; Circuit faults; Circuit testing; Clocks; Costs; Hardware; Instruments; Monitoring; Multiplexing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1997. ED&TC 97. Proceedings
Conference_Location :
Paris
ISSN :
1066-1409
Print_ISBN :
0-8186-7786-4
Type :
conf
DOI :
10.1109/EDTC.1997.582379
Filename :
582379
Link To Document :
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