DocumentCode :
3435869
Title :
Built-in self-test methodology for A/D converters
Author :
de Vries, R. ; Zwemstra, T. ; Bruls, E.M.J.G. ; Regtien, P.P.L.
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
fYear :
1997
fDate :
17-20 Mar 1997
Firstpage :
353
Lastpage :
358
Abstract :
A (partial) Built-in Self-Test (BIST) methodology is proposed for analog to digital (A/D) converters. In this methodology the number of bits of the A/D converter that needs to be monitored externally in a test is reduced. This reduction depends, among other things, on the frequency of the applied test signal. At low test signal frequencies only the least significant bit (LSB) needs to be monitored and a “full” BIST becomes feasible. An analysis is made of the trade-off between the size of the on-chip test circuitry and the accuracy of this BIST technique
Keywords :
analogue-digital conversion; built-in self test; error analysis; integrated circuit testing; A/D converters; ADC testing; BIST methodology; built-in self-test; least significant bit; onchip test circuitry; test signal frequencies; Analog-digital conversion; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Frequency; Integrated circuit testing; Monitoring; Performance evaluation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1997. ED&TC 97. Proceedings
Conference_Location :
Paris
ISSN :
1066-1409
Print_ISBN :
0-8186-7786-4
Type :
conf
DOI :
10.1109/EDTC.1997.582382
Filename :
582382
Link To Document :
بازگشت