Title :
Development of energy consumption ratio test
Author :
Sun, Xiaoyun ; Kinney, Larry ; Vinnakota, Bapiraju
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., USA
fDate :
27 April-1 May 2003
Abstract :
Dynamic Idd test methods have been shown to detect defects that escape other test techniques. Normal process variations decrease the fault coverage and affect the performance of dynamic Idd test techniques. A dynamic-current based test metric, Energy Consumption Ratio (ECR), has been proposed to address the process variation problem and has been validated through extensive simulations and applications on manufactured circuits. In this paper, we first discuss the problems in practical implementation of ECR tests on large-size circuits of advanced technology, e.g., increased circuit size and leakage current degrade ECR performance. We then propose two possible solutions: one is based on extensive statistical data analysis and another uses an enhanced scan design to partition the circuit. Experimental results from simulations and actual devices are included in this paper.
Keywords :
CMOS digital integrated circuits; VLSI; data analysis; design for testability; integrated circuit testing; logic testing; statistical analysis; DFT; ECR tests; circuit partitioning; dynamic Idd test methods; dynamic-current based test metric; energy consumption ratio test; enhanced scan design; fault coverage; large-size circuits; leakage current; process variation problem; statistical data analysis; Energy consumption; Testing; Very large scale integration;
Conference_Titel :
VLSI Test Symposium, 2003. Proceedings. 21st
Print_ISBN :
0-7695-1924-5
DOI :
10.1109/VTEST.2003.1197664