Design and development of high bit rate QPSK demodulator

Author

Raghavendra, M.R. ; Sharada, S. ; Chandrasekharam, K. ; Sharma, Ashok ; Gupta, Puneet ; Midhun, M.

Author_Institution

Spacecraft Checkout Group, ISRO Satellite Centre, Bangalore, India

fYear

2013

fDate

17-19 Jan. 2013

Firstpage

1

Lastpage

5

Abstract

The Quadrature Phase Shift Keying(QPSK) demodulator being presented here is designed based on Modified Costas loop technique to demodulate data rates upto 2 × 200Mbps. This paper highlights the design challenges involved in handling very high data rates in the analog domain with minimum cross-talk between I & Q chains and distortion in the demodulated signal. This paper also discusses about the ambiguity free lock detection in the Costas loop. Achieved Bit Error Rate(BER) performance with analog implementation has been quite encouraging.

Keywords

crosstalk; demodulation; error statistics; quadrature phase shift keying; signal detection; BER; I & Q chain; ambiguity free lock detection; bit error rate; data demodulation; high bit rate QPSK demodulator; minimum crosstalk analog domain; modified Costas loop technique; quadrature phase shift keying; signal demodulation; Bandwidth; Delay; Demodulation; Detectors; Phase noise; Phase shift keying;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Computing and Communication Technologies (CONECCT), 2013 IEEE International Conference on

Conference_Location

Bangalore

Print_ISBN

978-1-4673-4609-2

Type

conf

DOI

10.1109/CONECCT.2013.6469295

Filename

6469295