DocumentCode :
3436845
Title :
Testable design and testing of micro-electro-fluidic arrays
Author :
Kerkhoff, Hans G. ; Acar, Mustafa
Author_Institution :
Testable Design & Testing of Microsystems Group, MESA+Res. Inst., Enschede, Netherlands
fYear :
2003
fDate :
27 April-1 May 2003
Firstpage :
403
Lastpage :
409
Abstract :
The testable design and testing of a fully software-controllable lab-on-a-chip, including a fluidic array of FlowFETs, control and interface electronics is presented. Test hardware is included for detecting faults in the DMOS electro-fluidic interface and the digital parts. Multidomain fault modeling and simulation shows the effects of faults in the (combined) fluidic and electrical parts. The fault simulations also reveal important parameters of multi-domain test-stimuli, e.g. fluid velocity, for detecting both electrical and fluidic defects.
Keywords :
CMOS integrated circuits; arrays; design for testability; fault simulation; microfluidics; readout electronics; testing; DFT; DMOS electro-fluidic interface; FlowFET array; MEMS testing; fault simulations; gate electrode driver; interface electronics; micro-electro-fluidic arrays; microsystem testing; multi-domain test-stimuli; multidomain fault modeling; software-controllable lab-on-a-chip; testable design; Chemical analysis; Circuit faults; Control system synthesis; Electrical fault detection; Electronic equipment testing; Fluid flow control; Manufacturing; Silicon; Software testing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 2003. Proceedings. 21st
ISSN :
1093-0167
Print_ISBN :
0-7695-1924-5
Type :
conf
DOI :
10.1109/VTEST.2003.1197681
Filename :
1197681
Link To Document :
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