On the degradation of p-MOSFETs in analog and RF circuits under inhomogeneous negative bias temperature stress

Author

Schlünder, Christian ; Brederlow, Ralf ; Ankele, Benno ; Lill, Amulf ; Goser, Karl ; Thewes, Roland

Author_Institution

Infineon Technol., Munich, Germany

fYear

2003

fDate

30 March-4 April 2003

Firstpage

5

Lastpage

10

Abstract

The effect of inhomogeneous Negative Bias Temperature Stress (NBTS) applied to p-MOS transistors under analog and RF CMOS operating conditions is investigated. Experimental data of a 0.18 μm standard CMOS process are presented and an analytical model is derived to physically explain the effect of stress on the device characteristics. The impact of inhomogeneous NBTS on device lifetime is considered and compared to the homogeneous case.

Keywords

CMOS analogue integrated circuits; MOSFET; integrated circuit reliability; microwave field effect transistors; radiofrequency integrated circuits; semiconductor device models; semiconductor device reliability; thermal stresses; voltage-controlled oscillators; 0.18 μm standard CMOS process; 0.18 micron; 1.8 V; RF CMOS operating conditions; RF circuits; analog circuits; analytical model; device lifetime; inhomogeneous negative bias temperature stress; p-MOS transistors; p-MOSFET degradation; voltage-controlled oscillator; CMOS logic circuits; CMOS process; CMOS technology; Degradation; Inverters; MOSFET circuits; Radio frequency; Stress; Temperature; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium Proceedings, 2003. 41st Annual. 2003 IEEE International

Print_ISBN

0-7803-7649-8

Type

conf

DOI

10.1109/RELPHY.2003.1197712

Filename

1197712