DocumentCode
3437062
Title
A parallel simulated annealing algorithm for channel routing on a hypercube multiprocessor
Author
Brouwer, Randall J. ; Banerjee, Prithviraj
Author_Institution
Coord. Sci. Lab., Illinois Univ., Urbana, IL, USA
fYear
1988
fDate
3-5 Oct 1988
Firstpage
4
Lastpage
7
Abstract
The algorithm begins with an initial placement of nets in the channel using the number of tracks equal to the density of the channel. Overlapping subnets are permitted at this stage as the annealing process will gradually work to remove the overlaps. Transformations are then repeatedly applied to the channel state by moving nets around the channel in a parallel fashion. By allowing overlap situations and controlling them with appropriate cost function, the algorithm is capable of producing very good results with the advantage of decreased runtime from the parallelism. and can also be applied to extensions of the channel routing problem, such as switchbox routine with obstacle avoidance
Keywords
circuit layout CAD; optimisation; parallel algorithms; channel routing; channel routing problem; cost function; hypercube multiprocessor; obstacle avoidance; overlapping subnets; parallel simulated annealing algorithm; placement; switchbox routine; Computational modeling; Computer simulation; Greedy algorithms; Hypercubes; Parallel algorithms; Parallel processing; Pins; Routing; Simulated annealing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on
Conference_Location
Rye Brook, NY
Print_ISBN
0-8186-0872-2
Type
conf
DOI
10.1109/ICCD.1988.25647
Filename
25647
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