DocumentCode :
3437330
Title :
The BACK algorithm for sequential test generation
Author :
Cheng, Wu-Tung
Author_Institution :
AT&T Eng. Res. Center, Princeton, NJ, USA
fYear :
1988
fDate :
3-5 Oct 1988
Firstpage :
66
Lastpage :
69
Abstract :
A test-generation algorithm called the BACK algorithm is proposed for sequential test generation. The BACK algorithm is a modified D-algorithm. Instead of forward fault propagation to generate sensitized paths, the BACK algorithm creates the sensitized paths backwards by justifying the required sensitized values. The BACK algorithm not only is easier to implement but also requires less run-time memory than the D-algorithm. A testability measurement which guides the justification of sensitized values is also presented. The BACK algorithm has been implemented and used very successfully for AT&T sequential circuits
Keywords :
automatic testing; integrated circuit testing; logic testing; sequential circuits; AT&T sequential circuits; BACK algorithm; modified D-algorithm; sensitized paths; sensitized values; sequential test generation; test-generation algorithm; testability measurement; Circuit faults; Circuit testing; Combinational circuits; Iterative algorithms; Iterative methods; Logic arrays; Logic testing; Sequential analysis; Sequential circuits; Upper bound;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on
Conference_Location :
Rye Brook, NY
Print_ISBN :
0-8186-0872-2
Type :
conf
DOI :
10.1109/ICCD.1988.25661
Filename :
25661
Link To Document :
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