Title :
A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications
Author :
Unsuk Heo ; Xueqing Li ; Huichu Liu ; Gupta, Sumeet ; Datta, Suman ; Narayanan, Vijaykrishnan
Author_Institution :
Dept. of Comput. Sci. & Eng., Penn State Univ., University Park, PA, USA
Abstract :
This paper presents a high-efficiency switched-capacitance charge pump in 20 nm III-V heterojunction tunnel field-effect transistor (HTFET) technology for low-input-voltage applications. The steep-slope and low-threshold HTFET device characteristics are utilized to extend the input voltage range to below 0.20 V. Meanwhile, the uni-directional current conduction is utilized to reduce the reverse energy loss and to simplify the non-overlapping phase controlling. Furthermore, with unidirectional current conduction, an improved cross-coupled charge pump topology is proposed for higher voltage output and PCE. Simulation results show that the proposed HTFET charge pump with a 1.0 kΩ resistive load achieves 90.4% and 91.4% power conversion efficiency, and 0.37 V and 0.57 V DC output voltage, when the input voltage is 0.20 V and 0.30 V, respectively.
Keywords :
III-V semiconductors; charge pump circuits; field effect transistors; low-power electronics; switched capacitor networks; tunnel transistors; III-V HTFET technology; PCE; cross-coupled charge pump topology; efficiency 90.4 percent; efficiency 91.4 percent; heterojunction tunnel field-effect transistor; low-input-voltage applications; power-conversion-efficiency; resistance 1 kohm; size 20 nm; switched-capacitance charge pump; uni-directional current conduction; voltage 0.20 V to 0.57 V; Capacitors; Charge pumps; Energy loss; Integrated circuit modeling; Phase control; Silicon; Topology; Charge pump; DC-DC converter; power-conversion-efficiency (PCE); switched-capacitance; tunnel FET (TFET);
Conference_Titel :
VLSI Design (VLSID), 2015 28th International Conference on
Conference_Location :
Bangalore
DOI :
10.1109/VLSID.2015.58
