Parallel LU factorization for circuit simulation on an MIMD computer

Author

Chen, Chien-Chih ; Hu, Yu-Hen

Author_Institution

Dept. of Electr. Eng., Southern Methodist Univ., Dallas, TX, USA

fYear

1988

fDate

3-5 Oct 1988

Firstpage

129

Lastpage

132

Abstract

Direct method circuit simulation on an MIMD (multiple-instruction, multiple-data-stream) machine is studied. The focus is on the parallel LU (lower-upper) factorization a sparse matrix with a nested bordered-block diagonal (BBD) ordering. A novel computation model for the parallel factorization is proposed, and simulation results conducted on a ten-processor Sequent Balance 21000 parallel computer are reported. It is concluded that nested BBD ordering proves to be a highly concurrent structure for parallel LU factorization in direct method circuit simulation

Keywords

circuit analysis computing; parallel processing; MIMD computer; circuit simulation; computation model; nested bordered-block diagonal; ordering; parallel LU factorization; sparse matrix; ten-processor Sequent Balance 21000 parallel computer; Circuit simulation; Circuit topology; Computational modeling; Computer simulation; Concurrent computing; Linear systems; Parallel machines; Scheduling algorithm; Sparse matrices; Transient analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on

Conference_Location

Rye Brook, NY

Print_ISBN

0-8186-0872-2

Type

conf

DOI

10.1109/ICCD.1988.25676

Filename

25676