DocumentCode :
3437686
Title :
Investigation of optimized high-density flip-chip interconnect design including micro Au bumps and underfill for ultrabroadband (DC-40GHz) applications
Author :
Yasu, Youtaro ; Kato, Fumiki ; Kikuchi, Kazuro ; Nemoto, Shunsuke ; Nakagawa, Hirotoshi ; Koshiji, Kohji ; Aoyagi, Masahiro
Author_Institution :
NeRI, Nat. Inst. of Adv. Ind. Sci. & Technol. (AIST), Tsukuba, Japan
fYear :
2012
fDate :
9-11 Dec. 2012
Firstpage :
33
Lastpage :
36
Abstract :
In this study, the high-speed signal transmission characteristics of high density flip-chip interconnect incorporating micro Au bumps were investigated. A TEG (test element group) device and substrate was designed and fabricated to measure the properties of the high density interconnect structure. The test chip and substrate had Cu wires patterned to create a controlled impedance CPW (coplanar waveguide) transmission line in order to test the high-speed signal transmission properties. The characteristic impedance and S-parameters (S21,S11) of the flip-chip bonded test chip and substrate was measured. 50 Ω CPWs were successfully fabricated both with and without underfill. The use of underfill was found not to have a significant effect on the transmission lines S-parameters. In this work we have presented a method for designing specific impedance and high frequency properties on Si substrates in the presence of underfill and flip-chip bonded circuits.
Keywords :
S-parameters; coplanar waveguides; copper; elemental semiconductors; flip-chip devices; gold; integrated circuit bonding; integrated circuit interconnections; silicon; transmission lines; Au; Cu; S-parameters; Si; TEG device; characteristic impedance; coplanar waveguide; frequency 0 GHz to 40 GHz; high density flip-chip interconnect design; high speed signal transmission; microbump joints; resistance 50 ohm; test element group; transmission line; underfill; Bonding; Coplanar waveguides; Flip chip; Gold; Impedance; Substrates; Transmission line measurements;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2012 IEEE
Conference_Location :
Taipei
Print_ISBN :
978-1-4673-1444-2
Electronic_ISBN :
978-1-4673-1445-9
Type :
conf
DOI :
10.1109/EDAPS.2012.6469412
Filename :
6469412
Link To Document :
بازگشت