A novel TSV model considering nonlinear MOS effect for transient analysis

Author

Kuan-Yu Chen ; Yi-An Sheu ; Chi-Hsuan Cheng ; Jyun-Hong Lin ; Yih-Peng Chiou ; Tzong-Lin Wu

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

2012

fDate

9-11 Dec. 2012

Firstpage

49

Lastpage

52

Abstract

A novel equivalent circuit model of through-silicon via (TSV) considering the time-dependent capacitance due to metal-oxide-semiconductor (MOS) effect has been proposed. This model can characterize the variance of capacitance between metal and silicon substrate caused by the differential change of depletion region width as the voltage applied on the TSV changes with time. Compared to conventional TSV models, the capacitance has a 70% difference when the TSV´s applied voltage transits from low state to high state. Besides, 3% difference of eye height and 100% difference of eye jitter can be observed in eye diagram by SPICE simulation.

Keywords

equivalent circuits; integrated circuit modelling; three-dimensional integrated circuits; transient analysis; SPICE simulation; TSV model; depletion region width; equivalent circuit model; eye diagram; eye height; eye jitter; metal oxide semiconductor effect; metal substrate; nonlinear MOS effect; silicon substrate; through-silicon via; time-dependent capacitance; transient analysis; Analytical models; Capacitance; Equivalent circuits; Integrated circuit modeling; Silicon; Substrates; Through-silicon vias; MOS capacitance; Three dimensional IC (3-D IC); deep depletion; depletion effect; through-silicon via (TSV); time-dependent; transient analysis; transit time;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2012 IEEE

Conference_Location

Taipei

Print_ISBN

978-1-4673-1444-2

Electronic_ISBN

978-1-4673-1445-9

Type

conf

DOI

10.1109/EDAPS.2012.6469413

Filename

6469413