Title :
Deterministic test pattern reproduction by a counter
Author :
Kagaris, Dimitrios ; Tragoudas, Spyros ; Majumdar, Amitava
Author_Institution :
Dept. of Electr. Eng., Southern Illinois Univ., Carbondale, IL, USA
Abstract :
We propose a very simple and fast CAD tool to check whether a binary counter can reproduce a predetermined set of test patterns in a reasonable time. We use provably good algorithms to do column merging, complementation and permutation of the columns of the test matrix so that the distance between the starting and the finishing vector in the corresponding counter is minimized. Various test sets on benchmark circuits show that a counter may constitute an efficient test-pattern generator mechanism
Keywords :
automatic testing; built-in self test; combinational circuits; counting circuits; design for testability; integrated circuit testing; logic CAD; logic testing; CAD tool; benchmark circuits; binary counter; column merging; complementation; deterministic test pattern reproduction; finishing vector; permutation; starting vector; test matrix; test-pattern generator mechanism; Benchmark testing; Built-in self-test; Circuit testing; Clocks; Computer science; Counting circuits; Hardware; Logic testing; Merging; Test pattern generators;
Conference_Titel :
European Design and Test Conference, 1996. ED&TC 96. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-8186-7424-5
DOI :
10.1109/EDTC.1996.494125
