DocumentCode
3439174
Title
Two-dimensional orthogonal tiling: from theory to practice
Author
Andonov, Rumen ; Bourzoufi, Hafid ; Rajopadhye, Sanjay
Author_Institution
ISTV, Valenciennes, France
fYear
1996
fDate
19-22 Dec 1996
Firstpage
225
Lastpage
231
Abstract
In pipelined parallel computations the inner loops are often implemented in a block fashion. In such programs, an important compiler optimization involves the need to statically determine the grain size. This paper presents extensions and experimental validation of the previous results of Andonov and Rajopadhye (1994) on optimal grain size determination
Keywords
parallel architectures; pipeline processing; program compilers; SPMD programs; automatic parallelization; coarse grain pipelining; compiler optimization; distributed memory machines; inner loops; iteration space tiling; macro-systolic arrays; optimal grain size; orthogonal tiling; pipelined parallel computations; supernode partitioning; Concurrent computing; Costs; Difference equations; Distributed computing; Grain size; Optimizing compilers; Pipeline processing; Program processors; Shape; Tiles;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing, 1996. Proceedings. 3rd International Conference on
Conference_Location
Trivandrum
Print_ISBN
0-8186-7557-8
Type
conf
DOI
10.1109/HIPC.1996.565827
Filename
565827
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