TESA: Timeparallel Estimation of Switching Activity under a real delay model

We present a new method of an accurate and efficient estimation of switching activities in digital circuits. It combines the efficiency of formerly proposed timeparallel simulators with the accuracy of event driven logic simulators. We propose a novel event driven real delay simulation technique that can be applied to any timeparallel simulation method. General usability as well as runtime efficiency of our approach is demonstrated by the adaptation to two different timeparallel simulators and the comparison of their runtime to a commercial logic simulator