DocumentCode :
3439964
Title :
Bit-serial architectures for parameter extraction and phonetic encoding
Author :
Martínez, E. ; Martínez, P. ; Rodellar, V. ; Gómez, P.
Author_Institution :
Dept. de Arquitectura y Tecnologia de Sistemas Inf., Campus de Montegancedo, Madrid, Spain
fYear :
1991
fDate :
13-16 May 1991
Firstpage :
389
Lastpage :
392
Abstract :
One interesting application of digital signal processing is low-level speech recognition. A description is presented of the design of a whole structure made up of two substructures: an LPC (linear predictive coding) filter to compact the information present in the voice trace and a bit serial neural network which is used for the phonetic encoding of this trace. These substructures are designed with a silicon compiler adapted for digital signal algorithms and bit-serial architectures
Keywords :
computer architecture; encoding; neural nets; speech analysis and processing; speech recognition; LPC filter; bit serial neural network; bit-serial architectures; digital signal algorithms; digital signal processing; linear predictive coding; low-level speech recognition; parameter extraction; phonetic encoding; silicon compiler; voice trace; Digital signal processing; Encoding; Information filtering; Information filters; Linear predictive coding; Neural networks; Nonlinear filters; Parameter extraction; Signal design; Speech recognition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CompEuro '91. Advanced Computer Technology, Reliable Systems and Applications. 5th Annual European Computer Conference. Proceedings.
Conference_Location :
Bologna
Print_ISBN :
0-8186-2141-9
Type :
conf
DOI :
10.1109/CMPEUR.1991.257416
Filename :
257416
Link To Document :
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