Fault-tolerance in parallel architectures with crosspoint switches

Author

Stenzel, G. ; Spruth, W. ; Blum, Andrew ; Boettiger, H. ; Louis, H. ; Scarafia, S.

Author_Institution

IBM Lab. Boblingen, Germany

fYear

1991

fDate

13-16 May 1991

Firstpage

480

Lastpage

486

Abstract

Based on an existing IBM/370 switch connected parallel processor (SCPP) prototype implementation, conceptual enhancements in the design for continuous availability are described. These enhancements include the user-specifiable two- to three-fold concurrent execution of processes on nonsynchronized processing units (PUs). The output produced by these processes is compared by software or hardware means. The asynchronism of the execution allows the detection of context-dependent software failures in addition to the detection of hardware errors. These design advances encompass novel hardware and software features aimed at achieving continuous system operation as well as superior information integrity at an improved cost/performance ratio, facilitating a proven crosspoint switch intercommunication mechanism of the SCPP

Keywords

fault tolerant computing; parallel architectures; IBM/370; concurrent execution; context-dependent software failures; continuous availability; crosspoint switches; fault tolerance; hardware errors; information integrity; nonsynchronized processing units; parallel architectures; switch connected parallel processor; Computer errors; Continuous time systems; Costs; Fault tolerance; Hardware; Parallel architectures; Prototypes; Software performance; Software prototyping; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

CompEuro '91. Advanced Computer Technology, Reliable Systems and Applications. 5th Annual European Computer Conference. Proceedings.

Conference_Location

Bologna

Print_ISBN

0-8186-2141-9

Type

conf

DOI

10.1109/CMPEUR.1991.257433

Filename

257433