A modular VLSI architecture for coincidence detection in positron emission tomography

A VLSI architecture for a portion of the processing required to reconstruct images for positron emission tomography is described. Implementing this architecture in VLSI not only reduced the size and cost of the circuitry but also reduced the length requirements of an expensive high-speed cable. The architecture was practical only in VLSI since it required a large number of internal connections. However, the silicon area needed for making these connections was minimized by using nearest-neighbor communication within the array of modules. Furthermore, the design complexity of the architecture was kept manageable by replicating a single module 56 times within the array