OLYMPO: a GaAs compiler for VLSI design

A gallium arsenide automated layout generation system (OLYMPO) for VLSI circuits and system design has been developed. Cell, macrocell and module compilers are the basis of the layout automation tool. The cell and macrocell compiler takes a circuit schematic at logic level and outputs a mask layout. The compiler uses a full-custom layout style, called RN-based cell model. The cell compiler can be used as a cell library builder and it is embedded in a random logic macrocell and an iterative logic array generator for module generation. Experimental results for datapath generation (adders, multipliers, FIR filters, register modules, among others) demonstrate that OLYMPO generates complex and compact layouts and the synthesis process can be interactively used at the system design level