Thread-based software synthesis for embedded system design

We propose a thread-based software synthesis technique to reduce communication overhead incurred by the hardware-software interface in a system. We start from a CDFG that models the system. The CDFG is analyzed and partitioned into a set of threads. Then we generate a mixed static-dynamic thread scheduler. The scheduler statically schedules as many threads as possible to maximize the scheduling overhead. Then the scheduler dynamically schedules the remaining threads. Reduction of the total execution time including the communication overhead is demonstrated with some examples