• DocumentCode
    3441536
  • Title

    A serial-input serial-output bit-sliced convolver

  • Author

    Dadda, Luigi ; Breveglieri, Luca

  • Author_Institution
    Dept. of Electron., Politecnico di Milano, Italy
  • fYear
    1988
  • fDate
    3-5 Oct 1988
  • Firstpage
    490
  • Lastpage
    495
  • Abstract
    A novel convolver is presented in which both samples and results are in serial form, while coefficients are stored in internal registers. The convolver is composed of an array of multiplier-accumulator subunits which operate in a carry-save, serial/parallel mode. The sample bits are broadcast to all subunits, each one executing the multiplication with the stored coefficient and accumulating the product with the result received from the preceding unit. The structure can be shown to be decomposable in bit-slices; a stack of slices can be programmed as a convolver for prescribed sample and coefficient bit-length under the control of a configuration register. Faulty slices can be neutralized by variables stored in a second register
  • Keywords
    digital arithmetic; internal registers; multiplier-accumulator subunits; serial-input serial-output bit-sliced convolver; Bit rate; Broadcasting; Concurrent computing; Convolution; Convolvers; Delay; Parallel architectures; Sampling methods; Signal processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on
  • Conference_Location
    Rye Brook, NY
  • Print_ISBN
    0-8186-0872-2
  • Type

    conf

  • DOI
    10.1109/ICCD.1988.25749
  • Filename
    25749