DocumentCode
3441542
Title
A new compact model for junctions in advanced CMOS technologies
Author
Scholten, A.J. ; Smit, G.D.J. ; Durand, M. ; van Langevelde, R. ; Dachs, C.J.J. ; Klaassen, D.B.M.
Author_Institution
Philips Res. Labs., Eindhoven
fYear
2005
fDate
5-5 Dec. 2005
Lastpage
203
Abstract
We present a new compact model for the junction capacitances and leakage currents in deep-submicron CMOS technologies. The model contains Shockley-Read-Hall generation/recombination, trap-assisted tunneling, band-to-band-tunneling, and avalanche breakdown. It has been validated for a wide range of bias and temperature, for NMOS and PMOS junctions, and for different CMOS generations
Keywords
CMOS integrated circuits; avalanche breakdown; leakage currents; semiconductor device models; semiconductor junctions; NMOS junctions; PMOS junctions; Shockley-Read-Hall generation/recombination; avalanche breakdown; band to band tunneling; deep submicron CMOS technologies; junction capacitances; leakage currents; trap assisted tunneling; wide range; Avalanche breakdown; CMOS technology; Capacitance; Equations; Leakage current; MOS devices; MOSFETs; Semiconductor device modeling; Temperature distribution; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location
Washington, DC
Print_ISBN
0-7803-9268-X
Type
conf
DOI
10.1109/IEDM.2005.1609306
Filename
1609306
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