DocumentCode :
3441623
Title :
RAM testing algorithms for detection multiple linked faults
Author :
Mikitjuk, V.G. ; Yarmolik, V.N. ; van de Goor, A.J.
Author_Institution :
Dept. of Inf. & Radioelectron., Byelorussian State Univ., Minsk, Byelorussia
fYear :
1996
fDate :
11-14 Mar 1996
Firstpage :
435
Lastpage :
439
Abstract :
Many fault models for RAMs and tests for faults of these models are available. In most cases these tests allow for the detection of single faults only. This paper contains fault coverage analysis of march tests which detect multiple faults. It is shown there are faults which are not detected by any of the existing march tests. So we propose new test algorithms which cover multiple faults and are particularly effective for detecting linked faults while, at the same time, having short test time
Keywords :
automatic testing; integrated circuit testing; integrated memory circuits; random-access storage; RAM testing algorithms; fault coverage analysis; fault models; march tests; multiple linked faults detection; Decoding; Fault detection; Informatics; Iron; Logic arrays; Random access memory; Read-write memory; Testing; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1996. ED&TC 96. Proceedings
Conference_Location :
Paris
ISSN :
1066-1409
Print_ISBN :
0-8186-7424-5
Type :
conf
DOI :
10.1109/EDTC.1996.494337
Filename :
494337
Link To Document :
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