DocumentCode :
3441636
Title :
45-nm node NiSi FUSI on nitrided oxide bulk CMOS fabricated by a novel integration process
Author :
Yu, S. ; Lu, J.-P. ; Mehrad, F. ; Bu, H. ; Shanware, A. ; Ramin, M. ; Pas, M. ; Visokay, M.R. ; Vitale, S. ; Yang, S.-H. ; Jiang, P. ; Hall, L. ; Montgomery, C. ; Obeng, Y. ; Bowen, C. ; Hong, H. ; Tran, J. ; Chapman, R. ; Bushman, S. ; Machala, C. ; Blat
Author_Institution :
Silicon Technol. Dev., Texas Instrum. Inc., Dallas, TX
fYear :
2005
fDate :
5-5 Dec. 2005
Firstpage :
221
Lastpage :
224
Abstract :
Bulk CMOS transistors with NiSi fully silicided gate electrodes (FUSI) on plasma nitrided oxide gate dielectric are fabricated by a novel integration method using CoSi2 as Ni barrier layer on active regions. Performance improvements of 15% (NMOS) and 31% (PMOS) are demonstrated over poly gate electrode transistors at 35 nm gate length. FUSI impact on gate leakage, inversion oxide thickness, VT variation, and gate oxide reliability are compared to poly gate devices. Dopant modulation of NiSi FUSI gate electrode work-function are studied
Keywords :
CMOS integrated circuits; MOSFET; cobalt compounds; dielectric materials; nickel compounds; semiconductor device manufacture; semiconductor doping; work function; 45 nm; CoSi2; FUSI; NMOS; Ni barrier layer; NiSi; PMOS; dopant modulation; fully silicided gate electrodes; gate leakage; gate oxide reliability; inversion oxide thickness; nitrided oxide bulk CMOS transistors; oxide gate dielectric; poly gate devices; polygate electrode transistors; CMOS process; CMOS technology; Electrodes; Etching; Gate leakage; MOS devices; Nickel; Plasma stability; Silicidation; Silicides;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-9268-X
Type :
conf
DOI :
10.1109/IEDM.2005.1609312
Filename :
1609312
Link To Document :
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