A CMOS current-mode PWM technique for analog neural network implementations

In this paper, a CMOS current-mode pulse width modulation (PWM) technique for efficiently implementing analog neural networks is presented. The weighted summation operation (required for a neural network) is realized by switching a weight current, controlled by a pulse whose width is proportional to an input current. This current is then applied to a resettable current integrator. The sigmoid transformation is naturally performed by the nonlinear transconductance amplifier which forms the integrator. This results in minimum silicon area and therefore is suitable for very large scale neural systems. Other pronounced features of the current-mode PWM technique are its easy programmability, electronically adjustable gains of neurons, and modular structures. In this paper, four modules are introduced with which almost all neural networks can be realized modularly. Simulations are provided to verify the validity of our proposed technique